1. Field of the Invention
The present invention relates to integrated circuit technology. More specifically, the present invention relates to charge pumps and to a charge pump for generation of multiple output-voltage levels.
2. The Prior Art
Charge pumps are switched-capacitor circuits employed to obtain either an output voltage higher than that of the power supply (VDD) or a negative voltage in an electronic system. Charge pumps are widely used in the integrated circuit industry in many applications such as power ICs, filters, memories, etc. Flash memory devices are among these applications since high voltage levels are needed to perform flash memory operations such as program and erase. Moreover, due to the trend of increasingly lower voltage supply requirements, a voltage level higher than VDD is also needed for flash memory read operation.
As shown in FIG. 1, conventional charge pump circuits 10 comprise a series of pumping stages 12, the number of which depends on the voltage gain required, and usually an output stage 14. As will be appreciated by persons of ordinary skill in the art, each pumping stage includes capacitors, switches and drivers and is controlled by one or more clock signals. Voltage multiplication is obtained by properly charging and switching the pumping stage capacitors. Different ways to obtain voltage multiplication are possible by changing the topology of the pump stage, switching order, etc. For example, different charge pumps can be obtained by cascading Dickson stages or voltage doublers.
Whatever the principle of operation of the charge pump, it is often necessary to regulate the output voltage. In such instances, a regulator circuit 16 is required as is shown in FIG. 2 to ensure that the output voltage does not exceed a maximum value and does not drop below a minimum value.
Voltage regulation can be divided in two different types: pulse-skip regulation and linear regulation. Pulse-skip regulation operates by enabling the pump clocks only when the output pump voltage is lower than a given value and suppressing clock signals when the output pump voltage exceeds this value. Linear regulation operates by controlling the output voltage by means of a closed-loop error amplifier and a pass device. Both of these techniques are known in the art.
FIG. 3A is a block diagram showing a high-voltage generator with a pulse-skip regulation. The charge pump circuit 10 is supplied by VDD (the external supply voltage) at reference numeral 18 and delivers electric charge to the load 20 (CLOAD) connected to the output. The regulation is accomplished by a comparator 22 whose non-inverting input is coupled to a fraction Vf of the output voltage divided by resistors 24 and 26 and whose inverting input is coupled to a fixed voltage BGAP from a source such as a bandgap reference. If Vf>BGAP, the signal STOP at the output of comparator 22 is high and the output of the pump clock signal generator 28 is inhibited. On the other hand, if Vf<BGAP, signal STOP is low and clock signal generator 28 provides clock signals to the charge pump 10 therefore enabling the charge of the capacitance 20 at the output line VOUT.
FIG. 3B is a block diagram illustrating a high-voltage generator with linear regulation. Again the charge pump is identified by reference numeral 10. In this configuration, clock generator 28 is always enabled. The linear regulation is implemented by an amplifier 30, a pass transistor 32 and a resistor network including resistors 24 and 26 in a closed-loop configuration. In both pulse-skip and linear regulation, the regulated output is given by:OUT=r*BGAP,where r=(R24+R26)/R26. Resistors 24 and 26 are configurable to allow the user to select a specific output voltage.
In many applications, more than one high-voltage level is needed. For example in flash memories different high voltage levels are required for program, erase and read operation. Moreover, in some flash memory architectures all drivers that are employed are fabricated as n-channel transistors in order to improve memory performances and/or limit the driver silicon area. In these cases a first voltage to be passed by the driver is required and a second voltage, higher than the first, is required to bias the driver itself. It is worth noting that the use of the same voltage for the both tasks would lead to a loss in the output voltage that is equal to the n-channel transistor threshold voltage
This is illustrated in FIGS. 4A and 4B, in which an example of an all n-channel word-line driver for a flash memory is shown employing transistors 40 and 42. The driver illustrated in FIGS. 4A and 4B switches between two values: 0 and V1 (for example 0 for unselected word-line, V1 for the selected word-line). FIG. 4A illustrates a correct driver biasing for the pull-up transistor 40 of the driver with a voltage V2 sufficiently high to pass V1 to the word-line without voltage loss, while FIG. 4B illustrates a non-optimal biasing leading to a drop in the word-line voltage equal to the threshold of transistor 40.
In such applications in which several high voltage levels are needed inside the chip, a plurality of charge pumps 10 are employed to generate the voltages V1, V2, and Vn required as shown in FIG. 5A. Alternatively, as shown in FIG. 5B, a single charge pump 10 can be used to obtain the highest voltage required (V1) and other voltages V2 and V3 can be obtained from linear regulators 16 such as shown in FIG. 3B coupled to the charge pump output. In the latter case (use of multiple linear regulators) a drop in efficiency is expected since each linear regulator draws current from the pump output voltage.